Efficient Realization of Sigma-Delta (∑-Δ) Kalman Lowpass Filter in Hardware Using FPGA

Sigma-delta (Σ-Δ) modulation techniques have moved into mainstream applications in signal processing and have found many practical uses in areas such as high-resolution A/D, D/A conversions, voice communication, and software radio. Σ-Δ modulators produce a single, or few bits output resulting in hardware saving and thus making them suitable for implementation in very large scale integration (VLSI) circuits. To reduce quantization noise produced, higher-order modulators such as multiloop and multistage architectures are commonly used. The quantization noise behavior of higher-order Σ-Δmodulators is well understood. Based on these quantization noise characteristics, various demodulator architectures, such as sinc filter, optimal FIR filter, and Laguerre filter are reported in literature. In this paper, theory and design of an efficient Kalman recursive demodulator filter is shown. Hardware implementation of Kalman lowpass filter, using field programmable gate array (FPGA), is explained. The FPGA synthesis results from Kalman filter design are compared with previous designs for sinc filter, optimum FIR filter, and Laguerre filter.